QuartusII Advanced Workshop

Our Intention

is to support our customer in:
reducing the actual training period
understanding Cyclone Architecture
familiarising them with Design Strategy 

Agenda

Introduction
PLD-Design Flow
CycloneIII Architecture
TimeQuest Timing Analysis
Assignment Editor
Embedded RAM
Clock Nets and PLLs
I/O Features
RTL/Technology Map Viewer
Settings and Timing Optimization
Hardware Debug Tools
Incremental Flow
Chip Planner
Simulation
Programmer
MAXII Architecture